1. Field of the Invention
The invention relates to a method for converting an integrated circuit into a test circuit for validating functionality of the integrated circuit and related semiconductor product thereof, and more particularly, to a method for converting an RF integrated circuit into a test circuit for validating functionality of the RF integrated circuit and a related semiconductor product thereof.
2. Description of the Prior Art
In semiconductor producing procedures, many integrated circuits (chips) are manufactured on a wafer. As is well known by those skilled in the art, in order to filter out defective chips, testing procedures are an important step in the manufacturing process. Out of all kinds of testing procedures, including on-wafer testing, module testing, and packaging testing, on-wafer testing is the most important test. For example, if defective chips are detected in the on-wafer test, these defective chips can be removed before packing or assembling of modules. If, however, they are undetected, some defective chips may be packaged or some assembled modules may contain defective chips. Evidently, much time and money is wasted because these defective chips cannot be utilized.
On-wafer testing is often performed utilizing a probing method or a loop-back method. The probing method utilizes a probing mechanism to test the chips. A well-known probe card can provide this function. The probe card comprises a plurality of probes, which can be electrically connected to the testing pads on the wafer, where the testing pads are connected to the inner circuits of the chips. The probe card can provide a test signal (for example, a test current or a test voltage), and detect whether the chip processes the test signal. Therefore, the defective chips, which cannot process the test signal well, can be detected by the probe card.
If the probing method is utilized to test radio frequency (RF) chips, however, another problem occurs. Because RF signals have high frequencies, the matching relationship between the input resistance and the output resistance is directly related to the test signal, which is injected into the RF integrated circuits for testing. Therefore, the contacting interface between the testing pads and the probe must be of a high quality in order to prevent a mismatch from occurring. This requirement also raises costs.
The loop-back method, the second method mentioned above, utilizes a switch to electrically connect the transmitter and receiver of the RF integrated circuit so that a loop-back link test circuit is formed. When the on-wafer test is performed, the switch is closed in order to conduct a test signal (please note that the test signal can be generated from the transmitter of the RF integrated circuit, and the test signal will be received by the receiver of the RF integrated circuit, hence it is called a loop-back link). In practical applications, however, the switch is non-ideal and causes signal distortion when the RF integrated circuit is utilized.